An electrolytic plating method is well known as a method for forming a bump on an electrode of a semiconductor substrate. This electrolytic plating method according to a related art is described as follows.
As shown in FIG. 7, a semiconductor substrate 11, which is made of silicon wafer, includes a plurality of electrodes 21. A photo-resist mask 70 is formed on the substrate 11, and has an opening for forming a bump 60 on a surface of the electrode 21. The substrate 11 is dipped in plating solution 4.
The electrode 21 of the substrate 11 is used as a cathode electrode dipped in the plating solution 4, and an anode electrode 8 is also dipped in the plating solution 4. Then, a predetermined electric voltage is supplied from a power supply 3 between the anode electrode 8 and the cathode electrode, so that metallic ions dissolved in the plating solution 4 are deposited on the surface of the cathode electrode, i.e., the electrode 21, on which the bump 60 is formed. Thus, the bump 60 is formed by deposition of the metallic ions.
In general, a copper film is deposited on the substrate 11 before the photo-resist mask 70 is formed on the substrate 11. In other words, the copper film is formed on the substrate 11, and the photo-resist mask 70 is formed on the copper film, so that the electrolytic plating is stabilized and the metallic ions are deposited properly. After the bump 60 is formed, unnecessary copper film is eliminated with etching method.
In the above method, for example, a diameter of the opening of the photo-resist mask 70 defines a shape of the bump 60. Moreover, by setting a predetermined thickness of the photo-resist mask 70, a height of the bump 60 can be controlled, and by setting a predetermined interval between the openings, an interval between the bumps 60 can be controlled.
Recently, according to densification of electronic circuit formed on a semiconductor chip, both of the electrode 21 and the bump 60 formed on the chip are required to minimize and to narrow each interval therebetween, respectively. Moreover, a high bump 60 is required so as to reduce a distortion arising from the difference of coefficient of thermal expansion between a printed circuit board and the semiconductor chip mounted on the printed circuit board. According to the above aspect, the electrolytic plating method has the following problems.
When the bump 60 is formed by the electrolytic plating method, a part of the bump 60 may lack because gaseous hydrogen produced in the plating solution prevents the bump from depositing. Moreover, some bumps 60 may fail to deposit and to grow by means of the gaseous hydrogen. Therefore, the bump 60 cannot be formed uniformly by the electrolytic plating method.
Further, when a plurality of bumps 60 is formed by the electrolytic plating method, each height of the bumps 60 may vary. Dispersion of the height among the bumps 60 increases in accordance with increasing the height of the bumps 60. Thus, it is difficult to mount the semiconductor chip having the bumps 60 on the printed circuit board because of the dispersion of the height. Especially in a case of high bumps, the chip cannot be mounted on the circuit board properly.